1. Field of the Invention
The invention relates to integrated circuits and more particularly to a method and means for the electrical and functional testing of integrated circuits.
2. Description of The Prior Art
In the past, tests made during manufacturing have been utilized to aid in the debugging and testing of integrated circuits both by themselves and after they have been soldered onto a circuit board along with other integrated circuits. The procedure usually consists of writing a pattern of bits to various storage elements on the integrated circuit and reading the pattern back, thus generating a particular pattern as the test result. It is also possible to have a self-test in which a test pattern is generated by internal circuitry on the integrated circuit, such as stepping through each sequential address of a programmable memory and reading the data stored at each addressed location, for comparison with a known list of what should have been stored at each location.
It has generally been necessary in the past to provide dedicated test signal pins which are utilized during testing to carry the test signals and to initiate the test procedure. Because integrated circuits are by nature very, very small, there is a practical physical limit on the number of input and output pins which are available for the integrated circuit. It is therefore desirable to be able to invoke testing without requiring dedicated test signal pins.
It is also desirable to be able to test an integrated circuit while it is in place and soldered to a circuit board. Furthermore it is desirable to be able to completely electrically isolate a particular integrated circuit from other integrated circuits on the circuit board in order to test the remainder of the board without interference from the particular integrated circuit.